{"id":60595,"date":"2024-03-06T10:40:30","date_gmt":"2024-03-06T02:40:30","guid":{"rendered":"https:\/\/www.ioiotimes.com\/?p=60595"},"modified":"2024-03-06T13:24:54","modified_gmt":"2024-03-06T05:24:54","slug":"amd%e6%93%b4%e5%b1%95%e9%a0%98%e5%85%88%e5%b8%82%e5%a0%b4%e7%9a%84fpga%e7%94%a2%e5%93%81%e7%b5%84%e5%90%88%ef%bc%8c%e6%8e%a8%e5%87%ba%e5%b0%88%e7%82%ba%e6%88%90%e6%9c%ac%e6%95%8f%e6%84%9f%e5%9e%8b","status":"publish","type":"post","link":"https:\/\/www.ioiotimes.com\/?p=60595","title":{"rendered":"AMD\u64f4\u5c55\u9818\u5148\u5e02\u5834\u7684FPGA\u7522\u54c1\u7d44\u5408\uff0c\u63a8\u51fa\u5c08\u70ba\u6210\u672c\u654f\u611f\u578b\u908a\u7de3\u61c9\u7528\u6253\u9020\u7684AMD Spartan UltraScale+\u7522\u54c1\u7cfb\u5217"},"content":{"rendered":"\n<h3 class=\"wp-block-heading\">\u5168\u65b0FPGA\u70ba\u5d4c\u5165\u5f0f\u8996\u89ba\u3001\u91ab\u7642\u3001\u5de5\u696d\u7db2\u8def\u3001\u6a5f\u5668\u4eba\u8207\u5f71\u7247\u61c9\u7528\u63d0\u4f9b\u9ad8I\/O\u6578\u91cf\u3001\u80fd\u6e90\u6548\u7387\u4ee5\u53ca\u5353\u8d8a\u7684\u5b89\u5168\u529f\u80fd<\/h3>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"1920\" height=\"1080\" src=\"https:\/\/www.ioiotimes.com\/wordpress\/wp-content\/uploads\/2024\/03\/\u5716\u4e00_AMD\u63a8\u51faAMD-Spartan-UltraScale-FPGA\u7522\u54c1\u7cfb\u5217.jpg\" alt=\"\" class=\"wp-image-60596\" title=\"\" srcset=\"https:\/\/www.ioiotimes.com\/wordpress\/wp-content\/uploads\/2024\/03\/\u5716\u4e00_AMD\u63a8\u51faAMD-Spartan-UltraScale-FPGA\u7522\u54c1\u7cfb\u5217.jpg 1920w, https:\/\/www.ioiotimes.com\/wordpress\/wp-content\/uploads\/2024\/03\/\u5716\u4e00_AMD\u63a8\u51faAMD-Spartan-UltraScale-FPGA\u7522\u54c1\u7cfb\u5217-300x169.jpg 300w, https:\/\/www.ioiotimes.com\/wordpress\/wp-content\/uploads\/2024\/03\/\u5716\u4e00_AMD\u63a8\u51faAMD-Spartan-UltraScale-FPGA\u7522\u54c1\u7cfb\u5217-1024x576.jpg 1024w, https:\/\/www.ioiotimes.com\/wordpress\/wp-content\/uploads\/2024\/03\/\u5716\u4e00_AMD\u63a8\u51faAMD-Spartan-UltraScale-FPGA\u7522\u54c1\u7cfb\u5217-768x432.jpg 768w, https:\/\/www.ioiotimes.com\/wordpress\/wp-content\/uploads\/2024\/03\/\u5716\u4e00_AMD\u63a8\u51faAMD-Spartan-UltraScale-FPGA\u7522\u54c1\u7cfb\u5217-1536x864.jpg 1536w\" sizes=\"(max-width: 1920px) 100vw, 1920px\" \/><\/figure>\n\n\n\n<p><\/p>\n\n\n\n<p>AMD\uff08NASDAQ:\u00a0AMD\uff09\u5ba3\u5e03\u63a8\u51fa AMD Spartan\u2122 UltraScale+\u2122 FPGA \u7522\u54c1\u7cfb\u5217\uff0c\u6b64\u70ba\u5ee3\u6cdb\u7684 AMD \u6210\u672c\u6700\u4f73\u5316 FPGA \u548c\u81ea\u884c\u8abf\u9069\u7cfb\u7d71\u55ae\u6676\u7247\uff08SoC\uff09\u7522\u54c1\u7d44\u5408\u7684\u6700\u65b0\u6210\u54e1\u3002Spartan UltraScale+\u5143\u4ef6\u70ba\u908a\u7de3\u7684\u5404\u7a2e I\/O \u5bc6\u96c6\u578b\u61c9\u7528\u63d0\u4f9b\u6210\u672c\u6548\u76ca\u8207\u80fd\u6e90\u6548\u7387\uff0c\u5728\u57fa\u65bc 28 \u5948\u7c73\u53ca\u4ee5\u4e0b\u88fd\u7a0b\u6280\u8853\u7684 FPGA \u9818\u57df\u5e36\u4f86\u696d\u754c\u6700\u9ad8\u7684 I\/O \u908f\u8f2f\u55ae\u5143\u6bd4\u7387<sup>\u8a3b1<\/sup>\uff0c\u7e3d\u529f\u8017\u8f03\u524d\u4ee3\u7522\u54c1\u964d\u4f4e\u9ad8\u9054 30%<sup>\u8a3b2<\/sup>\uff0c\u540c\u6642\u914d\u5099 AMD \u6210\u672c\u6700\u4f73\u5316\u7522\u54c1\u7ec4\u5408\u4e2d\u6700\u5f37\u5927\u7684\u5b89\u5168\u529f\u80fd\u7d44\u5408<sup>\u8a3b3<\/sup>\u3002<\/p>\n\n\n\n<p>AMD \u81ea\u884c\u8abf\u9069\u8207\u5d4c\u5165\u5f0f\u904b\u7b97\u4e8b\u696d\u7fa4\u5168\u7403\u526f\u7e3d\u88c1 Kirk Saban \u8868\u793a\uff0c25 \u5e74\u4f86\uff0cSpartan FPGA \u7522\u54c1\u7cfb\u5217\u70ba\u4eba\u985e\u7684\u4e00\u4e9b\u6700\u5049\u5927\u6210\u5c31\u63d0\u4f9b\u52d5\u529b\uff0c\u5f9e\u633d\u6551\u751f\u547d\u7684\u81ea\u52d5\u9664\u986b\u5668\u5230\u6b50\u6d32\u6838\u5b50\u7814\u7a76\u7d44\u7e54\uff08CERN\uff09\u7c92\u5b50\u52a0\u901f\u5668\uff0c\u4e0d\u65b7\u63a8\u9032\u4eba\u985e\u77e5\u8b58\u908a\u754c\u3002\u57fa\u65bc\u7d93\u904e\u9a57\u8b49\u7684 16 \u5948\u7c73\u6280\u8853\uff0cSpartan UltraScale+\u7522\u54c1\u7cfb\u5217\u7684\u5f37\u5316\u5b89\u5168\u8207\u529f\u80fd\u3001\u901a\u7528\u8a2d\u8a08\u5de5\u5177\u4ee5\u53ca\u9577\u4e45\u751f\u547d\u9031\u671f\u5c07\u9032\u4e00\u6b65\u52a0\u5f37\u6211\u5011\u9818\u5148\u5e02\u5834\u7684 FPGA \u7522\u54c1\u7d44\u5408<sup>\u8a3b4<\/sup>\uff0c\u4e26\u8457\u91cd\u6211\u5011\u70ba\u5ba2\u6236\u63d0\u4f9b\u6210\u672c\u6700\u4f73\u5316\u578b\u7522\u54c1\u7684\u627f\u8afe\u3002<\/p>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>\u9748\u6d3b\u7684I\/O<\/strong><strong>\u4ecb\u9762\u8207\u9ad8\u80fd\u6e90\u6548\u7387\u904b\u7b97\u529b<\/strong><\/h3>\n\n\n\n<p>Spartan UltraScale+ FPGA \u70ba\u908a\u7de3\u9032\u884c\u6700\u4f73\u5316\uff0c\u63d0\u4f9b\u9ad8 I\/O \u6578\u91cf\u548c\u9748\u6d3b\u7684\u4ecb\u9762\uff0c\u4f7f FPGA \u80fd\u7121\u7e2b\u6574\u5408\u4e26\u6709\u6548\u5730\u8207\u591a\u500b\u88dd\u7f6e\u6216\u7cfb\u7d71\u63a5\u5408\uff0c\u4ee5\u61c9\u5c0d\u611f\u6e2c\u5668\u548c\u9023\u63a5\u8a2d\u5099\u7684\u7206\u70b8\u5f0f\u6210\u9577\u3002<\/p>\n\n\n\n<p>\u57fa\u65bc 28 \u5948\u7c73\u4ee5\u4e0b\u88fd\u7a0b\u6280\u8853\u7684 FPGA \u7cfb\u5217\u63d0\u4f9b\u696d\u754c\u6700\u9ad8\u7684 I\/O \u908f\u8f2f\u55ae\u5143\u6bd4\u7387\uff0c\u5177\u5099\u591a\u9054 572 \u500b I\/O \u548c\u9ad8\u9054 3.3V \u7684\u96fb\u58d3\u652f\u63f4\uff0c\u70ba\u908a\u7de3\u611f\u6e2c\u548c\u63a7\u5236\u61c9\u7528\u5be6\u73fe\u4efb\u610f\u9023\u63a5\u3002\u7d93\u904e\u9a57\u8b49\u7684 16 \u5948\u7c73\u67b6\u69cb\u548c\u5c0d\u5404\u7a2e\u5c01\u88dd\u7684\u652f\u63f4\uff0c\u5f9e\u5c0f\u81f3 10&#215;10 \u6beb\u7c73\u8d77\uff0c\u5728\u8d85\u7dca\u6e4a\u7684\u7a7a\u9593\u4e2d\u63d0\u4f9b\u9ad8 I\/O \u5bc6\u5ea6\u3002\u5ee3\u6cdb\u7684 AMD FPGA \u7522\u54c1\u7d44\u5408\u5247\u63d0\u4f9b\u53ef\u64f4\u5c55\u6027\uff0c\u5f9e\u6210\u672c\u6700\u4f73\u5316 FPGA \u6301\u7e8c\u5230\u4e2d\u968e\u53ca\u9ad8\u968e\u7522\u54c1\u3002<\/p>\n\n\n\n<p>Spartan UltraScale+\u7cfb\u5217\u900f\u904e 16 \u5948\u7c73 FinFET \u6280\u8853\u8207\u786c\u5316\u9023\u63a5\uff0c\u76f8\u8f03\u65bc 28 \u5948\u7c73\u7684 Artix\u2122 7 \u7cfb\u5217\uff0c\u9810\u8a08\u53ef\u964d\u4f4e\u9ad8\u9054 30% \u7684\u529f\u8017\u3002\u4f5c\u70ba\u9996\u6b3e\u642d\u8f09\u786c\u5316 LPDDR5 \u8a18\u61b6\u9ad4\u63a7\u5236\u5668\u548c 8 \u500b PCIe<sup>\u00ae<\/sup>\u00a0Gen4 \u4ecb\u9762\u652f\u63f4\u7684 AMD UltraScale+ FPGA\uff0c\u70ba\u5ba2\u6236\u63d0\u4f9b\u80fd\u6e90\u6548\u7387\u8207\u8fce\u5411\u672a\u4f86\u7684\u529f\u80fd\u3002<\/p>\n\n\n\n<p><\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>\u5353\u8d8a\u7684\u5b89\u5168\u529f\u80fd<\/strong><\/h3>\n\n\n\n<p>Spartan UltraScale+ FPGA \u63d0\u4f9b AMD \u6210\u672c\u6700\u4f73\u5316 FPGA \u7522\u54c1\u7d44\u5408\u4e2d\u6700\u5353\u8d8a\u7684\u5b89\u5168\u529f\u80fd\u3002<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>\u4fdd\u8b77IP\uff1a<\/strong>\u652f\u63f4\u5f8c\u91cf\u5b50\u5bc6\u78bc\u6280\u8853\u4e26\u5177\u6709 NIST \u8a8d\u53ef\u7684\u6f14\u7b97\u6cd5\uff0c\u53ef\u63d0\u4f9b\u6700\u5148\u9032\u7684 IP \u4fdd\u8b77\uff0c\u62b5\u79a6\u4e0d\u65b7\u6f14\u8b8a\u7684\u7db2\u8def\u653b\u64ca\u548c\u5a01\u8105\u3002\u7269\u7406\u4e0d\u53ef\u8907\u88fd\u529f\u80fd\uff08PUF\uff09\u70ba\u6bcf\u500b\u8a2d\u5099\u63d0\u4f9b\u552f\u4e00\u7684\u6307\u7d0b\uff0c\u4ee5\u589e\u52a0\u5b89\u5168\u6027\u3002<\/li>\n\n\n\n<li><strong>\u9632\u6b62\u7be1\u6539\uff1a<\/strong>PPK\/SPK \u91d1\u9470\u652f\u63f4\u6709\u52a9\u65bc\u7ba1\u7406\u904e\u6642\u6216\u53d7\u5230\u5a01\u8105\u7684\u5b89\u5168\u91d1\u9470\uff0c\u800c\u5dee\u7570\u5316\u529f\u8017\u5206\u6790\u6709\u52a9\u65bc\u9632\u6b62\u65c1\u901a\u9053\u653b\u64ca\u3002\u88dd\u7f6e\u914d\u5099\u6c38\u4e45\u7684\u7be1\u6539\u8655\u7f70\uff0c\u4ee5\u9032\u4e00\u6b65\u9632\u6b62\u8aa4\u7528\u3002<\/li>\n\n\n\n<li><strong>\u6700\u5927\u9650\u5ea6\u5ef6\u9577\u6b63\u5e38\u904b\u884c\u6642\u9593\uff1a<\/strong>\u589e\u5f37\u7684\u55ae\u4e8b\u4ef6\u7ffb\u8f49\uff08single-event upset\uff09\u6548\u80fd\u6709\u52a9\u65bc\u5ba2\u6236\u9032\u884c\u5feb\u901f\u3001\u5b89\u5168\u7684\u914d\u7f6e\uff0c\u4e26\u63d0\u5347\u53ef\u9760\u6027\u3002<\/li>\n<\/ul>\n\n\n\n<p><\/p>\n\n\n\n<p>AMD FPGA \u548c\u81ea\u884c\u8abf\u9069 SoC \u7522\u54c1\u7d44\u5408\u7531 AMD Vivado\u2122\u8a2d\u8a08\u5957\u4ef6\u548c Vitis\u2122\u7d71\u4e00\u8edf\u9ad4\u5e73\u53f0\u63d0\u4f9b\u652f\u63f4\uff0c\u4f7f\u786c\u9ad4\u8207\u8edf\u9ad4\u8a2d\u8a08\u4eba\u54e1\u80fd\u900f\u904e\u4e00\u6b3e\u5f9e\u8a2d\u8a08\u5230\u9a57\u8b49\u7684\u55ae\u4e00\u8a2d\u8a08\u5de5\u5177\uff0c\u5145\u5206\u767c\u63ee\u5de5\u5177\u4ee5\u53ca\u5176\u4e2dIP\u7684\u751f\u7522\u529b\u512a\u52e2\u3002<\/p>\n\n\n\n<p>AMD Spartan UltraScale+ FPGA \u7522\u54c1\u7cfb\u5217\u7684\u6a23\u54c1\u548c\u8a55\u4f30\u5957\u4ef6\u9810\u8a08\u65bc 2025 \u5e74\u4e0a\u534a\u5e74\u4e0a\u5e02\u3002\u76f8\u95dc\u6587\u4ef6\u5df2\u63a8\u51fa\uff0c\u4e26\u65bc 2024 \u5e74\u7b2c 4 \u5b63\u8d77\u81ea AMD Vivado \u8a2d\u8a08\u5957\u4ef6\u958b\u59cb\u63d0\u4f9b\u5de5\u5177\u652f\u63f4\u3002<\/p>\n\n\n\n<p><\/p>\n\n\n\n<p>   <\/p>\n\n\n\n<p><sup>\u8a3b1\uff1a\u6839\u64da\u622a\u81f32024\u5e742\u6708\u7684AMD Spartan\u2122 UltraScale+\u2122 FPGA\u7522\u54c1\u8cc7\u6599\u8868\uff0c\u4ee5\u53caEfinix\u3001\u82f1\u7279\u723e\u3001\u840a\u8fea\u601d\u548cMicrochip\u767c\u5e03\u7684\u8cc7\u6599\u8868\uff0c\u6bd4\u8f03\u76f8\u4f3c\u768428\u5948\u7c73\u53ca\u66f4\u4f4e\u88fd\u7a0b\u7bc0\u9ede\u5927\u5c0f\u7684FPGA\u4e4b\u7e3dI\/O\u8207\u908f\u8f2f\u55ae\u5143\u6bd4\u7387\u3002SUS-11<br>\u8a3b2\uff1a\u4f30\u7b97\u57fa\u65bcAMD\u5be6\u9a57\u5ba4\u57282024\u5e741\u6708\u7684\u5185\u90e8\u5206\u6790\uff0c\u4f7f\u7528\u57fa\u65bcAMD Artix UltraScale+ AU7P FPGA\u908f\u8f2f\u55ae\u5143\u6578\u5dee\u7570\u7684\u7e3d\u529f\u8017\u8a08\u7b97\uff08\u975c\u614b\u52a0\u52d5\u614b\u529f\u8017\uff09\uff0c\u4f30\u7b9716nm AMD Spartan\u2122 UltraScale+\u2122 SU35P FPGA\u820728nm AMD Artix 7 7A35T FPGA\u7684\u529f\u8017\uff0c\u4f7f\u7528Xilinx Power Estimator(XPE)\u5de5\u51772023.1.2\u7248\u672c\u3002\u7576\u6700\u7d42\u7522\u54c1\u5728\u5e02\u5834\u4e0a\u767c\u5e03\u6642\uff0c\u5be6\u969b\u7e3d\u529f\u8017\u5c07\u6839\u64da\u914d\u7f6e\u3001\u4f7f\u7528\u60c5\u51b5\u53ca\u5176\u4ed6\u56e0\u7d20\u7684\u4e0d\u540c\u800c\u6709\u6240\u8b8a\u5316\u3002SUS-03<br>\u8a3b3\uff1a\u57fa\u65bcAMD 2023\u5e7412\u6708\u7684\u5185\u90e8\u5206\u6790\uff0c\u4f7f\u7528\u7522\u54c1\u8aaa\u660e\u66f8\u6bd4\u8f03\u4e86Spartan\u2122 UltraScale+\u2122 FPGA\u8207\u4e0a\u4e00\u4ee3AMD\u6210\u672c\u6700\u4f73\u5316FPGA\u7684\u5b89\u5168\u529f\u80fd\u6578\u91cf\u3002SUS-02<br>\u8a3b4\uff1a\u6536\u5165\u8cc7\u6599\u3001Omdia\u7af6\u722d\u683c\u5c40\u5de5\u5177CTL\u3001\u5b63\u5ea6\u534a\u5c0e\u9ad4\u5e02\u5834\u4efd\u984d\u30022023\u5e7411\u6708\u3002<\/sup><\/p>\n\n\n\n<p> <\/p>\n\n\n\n<p><\/p>\n\n\n\n<p><\/p>\n\n\n\n<h4 class=\"wp-block-heading has-text-align-right has-very-light-gray-to-cyan-bluish-gray-gradient-background has-background\">\ud83d\udfe6<a href=\"https:\/\/reurl.cc\/prb1d4\" target=\"_blank\" rel=\"noopener\">\u56de\u7b54 Archer BE55 \u901a\u95dc\u79d8\u8a9e \u9001\u60a8\u7db2\u8def\u651d\u5f71\u6a5f<\/a><br>\ud83d\udfe6<a href=\"https:\/\/reurl.cc\/orq4Mg\" target=\"_blank\" rel=\"noopener\">\u770bPREDATOR Pallas II DDR5 \u6587\u7ae0 \u6436\u62ffSSD<\/a><br><strong>\ud83d\udfe6<\/strong>ioioTIMES\u300c\u5e74\u5ea6\u91d1\u8cde2023\u300d <a href=\"https:\/\/reurl.cc\/qrppny\" data-type=\"link\" data-id=\"https:\/\/reurl.cc\/qrppny\" target=\"_blank\" rel=\"noreferrer noopener\">\u770b\u6587\u7ae0\u3001\u5206\u4eab  \u62ff\u597d\u79ae!!<\/a>  <strong>~\u5feb\u4f86\u53c3\u52a0~<\/strong><br>\ud83d\udfe6<strong>\u73fe\u5728\u5c31\u52a0\u5165&nbsp;<a href=\"https:\/\/www.facebook.com\/profile.php?id=100086628162118\" target=\"_blank\" rel=\"noreferrer noopener\">ioioTIMES \u81c9\u66f8\u7c89\u7d72\u5718<\/a>&nbsp;\u66f4\u591a\u4e92\u52d5\u3001\u66f4\u591a\u597d\u5eb7\u650f\u62b5\u52a0!!<\/strong><br>\ud83d\udfe6<strong>\u6211\u5011\u6709<a href=\"https:\/\/today.line.me\/tw\/v2\/publisher\/103117\" target=\"_blank\" rel=\"noreferrer noopener nofollow\">LINE TODAY<\/a>\u983b\u9053\u4e86\uff0c\u5feb\u4f86\u8ffd\u8e2a\u6211\u5011\u5427!!&#8211;\u6700\u65b0\u79d1\u6280\u65b0\u805e \u76e1\u5728\u4f60\u624b<\/strong><\/h4>\n\n\n\n<p> <\/p>\n","protected":false},"excerpt":{"rendered":"<p>\u5168\u65b0FPGA\u70ba\u5d4c\u5165\u5f0f\u8996\u89ba\u3001\u91ab\u7642\u3001\u5de5\u696d<\/p>\n","protected":false},"author":3,"featured_media":60596,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"rank_math_lock_modified_date":false,"footnotes":""},"categories":[13,17],"tags":[181,8918,580,6051,8917],"class_list":["post-60595","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news","category-it-info","tag-amd","tag-amd-spartan-ultrascale","tag-focus","tag-fpga","tag-8917"],"_links":{"self":[{"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=\/wp\/v2\/posts\/60595"}],"collection":[{"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=\/wp\/v2\/users\/3"}],"replies":[{"embeddable":true,"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=60595"}],"version-history":[{"count":6,"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=\/wp\/v2\/posts\/60595\/revisions"}],"predecessor-version":[{"id":60608,"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=\/wp\/v2\/posts\/60595\/revisions\/60608"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=\/wp\/v2\/media\/60596"}],"wp:attachment":[{"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=60595"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=60595"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.ioiotimes.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=60595"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}